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| MC54/74F174 HEX D FLIP-FLOP WITH MASTER RESET The MC54/74F174 is a high-speed hex D flip-flop. The device is used primarily as a 6-bit edge-triggered storage register. The device has a Master Reset to simultaneously clear all flip-flops. The F174 consists of six edge-triggered D flip-flops with individual D inputs and Q outputs. The Clock (CP) and Master Reset (MR) are common to all flip-flops. The state of each D input, one setup time before low-to-high clock transition, is transferred to the corresponding flig-flop's Q output. A LOW input to the Master Reset (MR) will force all outputs LOW independent of Clock or Data inputs. The F174 is useful for applications where only the true output is required and the Clock and Master Reset are common to all storage elements. * Six Edge-triggered D-type Inputs * Buffered Positive Edge-triggered Common Clock * Buffered, Asynchronous Common Reset 16 1 HEX D FLIP-FLOP WITH MASTER RESET FASTTM SCHOTTKY TTL J SUFFIX CERAMIC CASE 620-09 CONNECTION DIAGRAM DIP (TOP VIEW) VCC 16 Q5 15 D5 14 D4 13 Q4 12 D3 11 Q3 10 CP 9 N SUFFIX PLASTIC CASE 648-08 1 16 16 1 D SUFFIX SOIC CASE 751B-03 1 MR 2 Q0 3 D0 4 D1 5 Q1 6 D2 7 Q2 8 GND ORDERING INFORMATION MC54FXXXJ MC74FXXXN MC74FXXXD Ceramic Plastic SOIC FUNCTION TABLE Inputs @ tn, MR = H Dn H L tn = Bit time before clock pulse tn + 1 = Bit time after clock pulse H = HIGH Voltage Level L = LOW Voltage Level Outputs @ tn + 1 Qn H 14 L 13 11 6 4 3 D5 D4 D3 D2 D1 D0 Q5 Q4 Q3 Q2 Q1 Q0 CP MR 9 1 15 12 10 7 5 2 LOGIC SYMBOL VCC = PIN 16 GND = PIN 8 FAST AND LS TTL DATA 4-86 MC54/74F174 LOGIC DIAGRAM MR CP D5 D4 D3 D2 D1 D0 D Q D Q D Q D CP CD Q D CP CD Q D Q CP CD CP CD CP CD CP CD Q5 Q4 Q3 Q2 Q1 Q0 GUARANTEED OPERATING RANGES Symbol VCC TA Supply Voltage Operating Ambient Temperature Range Parameter 54, 74 54 74 IOH IOL Output Current -- High Output Current -- Low 54, 74 54, 74 Min 4.5 -55 0 Typ 5.0 25 25 Max 5.5 125 70 -1.0 20 mA mA Unit V C DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits Symbol VIH VIL VIK VOH Parameter Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage 54, 74 74 VOL IIH Output LOW Voltage Input HIGH Current 2.5 2.7 0.5 20 0.1 IIL IOS ICC Input LOW Current Output Short Circuit Current (Note 2) Power Supply Current - 60 30 -0.6 -150 45 Min 2.0 0.8 -1.2 Typ Max Unit V V V V V V A mA mA mA mA Test Conditions Guaranteed Input HIGH Voltage Guaranteed Input LOW Voltage VCC = MIN, IIN = - 18 mA IOL = - 1.0 mA IOL = - 1.0 mA IOL = 20 mA VCC = 4.50 V VCC = 4.75 V VCC = MIN VCC = MAX, VIN = 2.7 V VCC = MAX, VIN = 7.0 V VCC = MAX, VIN = 0.5 V VCC = MAX, VOUT = 0 V VCC = MAX, Dn = MR = 4.5 V, CP = NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable device type. 2. Not more than one output should be shorted at a time, nor for more than 1 second. FAST AND LS TTL DATA 4-87 MC54/74F174 AC CHARACTERISTICS 54/74F TA = +25C VCC = +5.0 V CL = 50 pF Symbol fmax tPLH tPHL tPHL Parameter Maximum Clock Frequency Propagation Delay CP to Qn Propagation Delay MR to Qn Min 100 3.5 4.5 5.0 Typ 140 5.5 7.0 10 8.0 10 14 Max 54F TA = -55C to +125C VCC = 5.0 V 10% CL = 50 pF Min 80 3.5 4.5 5.0 10.0 12.0 16.0 Max 74F TA = 0C to +70C VCC = 5.0 V 10% CL = 50 pF Min 80 3.5 4.5 5.0 9.0 11.0 15.0 ns Max Unit MHz ns AC OPERATING REQUIREMENTS 54/74F TA = +25C VCC = +5.0 V Symbol ts(H) ts (L) th(H) th(L) tw(H) tw(L) tw(L) trec Parameter Setup Time, HIGH or LOW Dn to CP Hold Time, HIGH or LOW Dn to CP CP Pulse Width, HIGH or LOW MR Pulse Width LOW Recovery Time MR to CP Min 4.0 4.0 0 0 4.0 6.0 5.0 5.0 Typ Max 54F TA = -55C to +125C VCC = 5.0 V 10% Min 4.0 4.0 1.0 1.0 4.0 6.0 5.0 5.0 max 74F TA = 0C to +70C VCC = 5.0 V 10% Min 4.0 4.0 0 0 4.0 6.0 5.0 5.0 ns ns ns ns Max Unit FAST AND LS TTL DATA 4-88 |
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